About Patera IP

Technical expertise meets legal excellence in semiconductor patent litigation

Semiconductor Wafer

Attorney Profile

With a unique background bridging semiconductor engineering and patent law, I bring a rare combination of technical depth and legal expertise to each case.

Legal Credentials

  • JD from University of San Diego School of Law
  • Registered Patent Attorney (USPTO)
  • Admitted in California and before the Federal Circuit
  • 15+ years patent litigation experience

Technical Background

  • MS in Electrical Engineering (VLSI focus)
  • 9 years as semiconductor design engineer
  • Experience with FinFET, GAA technologies
  • Hands-on EDA tool experience (Cadence, Synopsys)

Strategic Approach

How technical expertise translates to legal advantage

Technical Claim Analysis

Ability to independently analyze patent claims and accused products without relying on expert declarations.

Prior Art Identification

Deep technical knowledge enables identification of obscure but highly relevant prior art.

Cost Efficiency

Engineering background reduces reliance on expensive technical experts in early case stages.